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Shift-register (59 bit)

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Circuit Description

A 59-bit shift register. This register is clocked once a second, with the data input driven by the current output of the decoder state-machine. Each bit clocked into the shift register corresponds to one bit of the DCF-77 time signal. At the end of a one-minute transmission, the shift register hold the complete DCF-77 time data for the following minute, in the order specified by the DCF-77 time code.

The flipflops that holds the hours, minutes, and seconds data are connected to output ports. The values on these ports are read and loaded into the output registers of the DCF-clock as soon as the decoder state-machine detects the start of a new minute.

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Impressum http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/45-misc/80-dcf77/Shifter59.html