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Loadable Counter (4 bit)

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Circuit Description

The 4-bit loadable synchronous counter used for the output registers (in front of the displays) of the DCF-77 clock.

The circuit is just a cascade of four 1-bit counters, connected via their carry-outputs and the count-enable inputs. For a detailed description, see the previous applet.

Print version | Run this demo in the Hades editor (via Java WebStart)
Usage | FAQ | About | License | Feedback | Tutorial (PDF) | Referenzkarte (PDF, in German)
Impressum http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/45-misc/80-dcf77/LoadCount4.html