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Hades Applets contents visual index introduction std_logic_1164 gatelevel circuits delay models flipflops adders and arithm... half-adder a... ripple-carry... BCD adder carry-select... CLA adder (8... CLA adder (1... CLA generator CLA adder block CLA adder, slow adder/subtra... 7485 comparator 7485 comparator 74181 ALU de... 74181 ALU ci... 74181+74182 ... 74182 CLA ge... Hamming-weight Hamming-weig... integer mult... square calcu... square root ... carry-save a... CSA based mu... counters LFSR and selftest memories programmable logic state-machine editor misc. demos I/O and displays DCF-77 clock relays (switch-le... CMOS circuits (sw... RTLIB logic RTLIB registers Prima processor D*CORE MicroJava Pic16 cosimulation Mips R3000 cosimu... Intel MCS4 (i4004) image processing ... [Sch04] Codeumsetzer [Sch04] Addierer [Sch04] Flipflops [Sch04] Schaltwerke [Sch04] RALU, Min... [Fer05] State-Mac... [Fer05] PIC16F84/... [Fer05] Miscellan... [Fer05] Femtojava FreeTTS | TTL-series 74181 ALU circuit Circuit Description This circuit shows the actual implementation of the TTL-series 4-bit 74181 ALU integrated circuit. The input signals for the A and B data inputs pass through three main stages of logic. The first stage consists of four identical blocks of logic connected to one pair of the (A,B) inputs and the four function selection inputs. Each block calculates the logical function selected by the S inputs and generates two output signals which are then passed to the next stage of logic. Note that the outputs generated by the first stage of logic are directly passed through to the F outputs (via the XOR gates) when the M input is high. The next stage of logic realizes the carry-look-ahead calculation for the arithmetic adder functions (when M is low), while the XOR gates calculate the summation (Ai+Bi) of each pair of data inputs. The final stage of logic consists of the output XOR gates and calculates the final sum by adding the carry bits and the (Ai+Bi) bits. | |||
Print version | Run this demo in the Hades editor (via Java WebStart) | ||||
Usage | FAQ | About | License | Feedback | Tutorial (PDF) | Referenzkarte (PDF, in German) | ||||
Impressum | http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/20-arithmetic/50-74181/SN74181.html |