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Class Summary |
| CounterRE |
CounterRE - an edge-triggered n-bit d-type register with enable and reset.
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| Latch |
Latch - a simple level-triggered n-bit wide latch without enable.
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| LatchR |
LatchR - a simple level-triggered n-bit wide latch with reset |
| LFSR |
LFSR - an edge-triggered 1..32-bit output LFSR register based
on the (31 3 0) polynom.
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| Reg |
Reg - an edge-triggered n-bit d-type register.
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| RegE |
RegE - an edge-triggered n-bit d-type register with enable.
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| RegR |
RegR - an edge-triggered n-bit d-type register with active-low reset.
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| RegRE |
RegRE - an edge-triggered n-bit d-type register with enable and reset.
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| RegWithInitialValue |
RegWithInitialValue - an edge-triggered 1..32-bit output register
which starts in an user-defined initial value instead of XXX.
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| ShiftRegR |
ShiftRegR - an edge-triggered n-bit d-type shift-register with
shift-enable and active-low reset.
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