counter with synchronous reset

Description

Another counter realized with the interactive state-machine editor, namely a counter with synchronous reset.

Please check the previous applet for an overview of the state-machine-editor and for the description of the basic seven state counter with binary encoded outputs. Click the input switches or type the 'c' and 'z' bindkeys to generate the clock pulses and to control the zero input.

In the applet shown here, an extra synchronous 'zero' input and several transitions have been added to the counter state machine. When the 'zero' input is logically high (1) during a rising edge of the clock, the state machine enters the S0 (zero) state.

Please note the conceptual difference between the synchronous 'zero' input and the asynchronous reset input (auto-generated by the state-machine editor).

Run the applet | Run the editor (via Webstart)