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Synchronous counter (D flipflops)

Synchronous counter (D flipflops) screenshot

Description

A 4-bit synchronous counter built from D-flipflops with carry-input (count-enable) and carry-output. In this circuit, the single clock signal is directly connected to all flipflops, so that all flipflops change state at the same time.

Click the clock and nreset input switches or type the 'c' (clock), 'r' (reset), and 'x' (carry-in) bindkeys to operate the counter.

Obviously, this counter consists of four identical stages with a D-type flipflop, an XOR-gate, and a two-input AND-gate each. The XOR-gate in front of the D input of the flipflop basically converts the D-type flipflop into a toggle (T-type) flipflop. This is the same structure as the JK-flipflop with both J and K tied to logical-1, as shown in the previous applet.

While the carry-logic shown in the previous applet required an n-input AND gate for stage n, the carry-chain used in this applet is based on two-input gates. The difference in structure is similar to the carry-lookahead and the ripple-carry adders shown in the previous chapter. Obviously, the output of any AND gate is only high when all lower stage AND gates (and the carry input) are also high.

In other words,

Dn = Qn XOR (Qn-1 AND Qn-2 AND ... AND Q1 AND Q0 AND carry_in)

Run the applet | Run the editor (via Webstart)


Impressum | 24.11.06
http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/30-counters/30-sync/sync-dff_print.html