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TTL-series 7485 comparator demonstration (24 bit)

TTL-series 7485 comparator demonstration (24 bit) screenshot

Description

This circuit demonstrates how to interconnect multiple 7485 chips to build an n-bit comparator. In the example, six chips are uses to create a 24-bit magnitude comparators for positive binary numbers (note that the comparison also works for binary-coded decimal numbers).

Obviously, the clean way to build the 24-bit comparator would have been to use six chips (with four A/B inputs each) for the first level, and then two more chips for the second level.

The design presented here, taken from the original TTL series datasheet from Texas Instruments, uses a simple trick to reduce the number of required chips. It uses the A<B_in and A>B_in inputs of the circuits to effectively provide five bits of input. However, this can lead to the funny situation that a first level chips asserts both its A<B_out and A>B_out outputs at the same time - if A equals B and the cascade inputs are both low. Luckily, the second level chip interprets this situation correctly and the circuit works as it should.

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Impressum | 24.11.06
http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/20-arithmetic/45-compare/7485-demo_print.html