hades.models.mcore
Class DcoreRAM

java.lang.Object
  hades.simulator.SimObject
      hades.models.rtlib.memory.GenericMemory
          hades.models.mcore.DcoreRAM

All Implemented Interfaces:

java.lang.Cloneable, ContextToolTip, Memory, java.io.Serializable, Simulatable

Direct Known Subclasses:

DcoreROM

public class DcoreRAM

extends GenericMemory

DcoreRAM - a RAM with n words by m bits with asynchronous (level sensitive) write enable and separate active-low chip select and output enable inputs for the D*CORE processor.

The user interface for the RAM offers a disassembler view with support for LABEL resolution and editing. Input and output formats display and use byte-addresses, but only aligned works will be accepted on input.

When chip-select or output enable are high, the data output of the RAM is tristated and writes are ignored. This component models a standard MSI/LSI RAM with asynchronous write enable - the adress is never latched. As long as write enable is low, the input data is written to the currently selected address.

Note that the model currently does not check for timing violations during write cycles.

See Also:

Serialized Form

Field Summary

protected int	addr_offset
protected DcoreDisassemblerEditorFrame	editor
protected PortStdLogicVector	port_A
protected PortStdLogicVector	port_DIN
protected PortStdLogicVector	port_DOUT
protected PortStdLogic1164	port_nCS
protected PortStdLogic1164	port_nOE
protected PortStdLogic1164	port_nWE
static double	t_access
static double	t_min_we_cycle
static double	t_setup
static double	t_tristate
static double	t_undefined

Fields inherited from class hades.models.rtlib.memory.GenericMemory

bit_mask, data, enableAnimationFlag, last_read_addr, last_read_data, last_write_addr, last_write_data, MEF, n_bits, n_words, resourcename, TRISTATED, UNDEFINED, vector_000, vector_111, vector_UUU, vector_XXX, vector_ZZZ

Fields inherited from class hades.simulator.SimObject

classloader, console, debug, name, parent, ports, propertySheet, simulator, symbol, versionId, visible

Constructor Summary

DcoreRAM()
DcoreRAM constructor

Method Summary

boolean	canChangeSize()
void	configure() create and display a 'ConfigDialog' to set the parameters for a SimObject.
protected void	constructPorts() construct the ports for this memory.
protected void	createEditor()
void	elaborate(java.lang.Object arg) elaborate(): On elaboration, the inputs of the DcoreRAM will be undefined.
void	evaluate(java.lang.Object arg) evaluate(): If either port_nCS, port_nOE or port_nWE are undefined, the DcoreRAM data is invalidated, and the DOUT value is undefined.
int	getAddrOffset() utility method to support systems with different memory components mapped into a single address space at different offsets.
java.awt.Component	getPropertySheet() return a reference to the 'property sheet' or configuration window for this SimObject.
boolean	initialize(java.lang.String s) initialize this DcoreRAM from a String.
boolean	parse(java.io.BufferedReader br) parse RAM data from a file specified via its Java 1.1 resourcename.
protected void	parseLabelLine(java.lang.String line)
boolean	resize(int n_words, int n_bits)
boolean	save(java.io.PrintWriter PW) write the memory data in a trivial addr:data format, one address per line.
void	setBitsPerWord(int n_bits)
void	setSize(int n_words)
void	write(java.io.PrintWriter ps)

Methods inherited from class hades.models.rtlib.memory.GenericMemory

addMemoryListener, addMemoryListenerOld, checkInvalidateMemory, constructStandardValues, createMemory, dataAtAddressIsUndefined, dbg, getAddressBusWidth, getBitsPerWord, getConfigDialog, getDataArray, getDataAt, getEnableAnimationFlag, getExternalResources, getHexDigitsPerWord, getHexString, getInstructionDecoder, getResourcename, getSize, getToolTip, initializeWithDefaultValues, initializeWithRandomValues, initializeWithX, initializeWithZeroes, isConnected, main, merge, needsExternalResources, notifyReadListeners, notifyReadListenersOld, notifyWriteListeners, notifyWriteListenersOld, parseRAM, removeMemoryListener, removeMemoryListenerOld, setDataArray, setDataAt, setEnableAnimationFlag, setEnableAnimationFlag, setInstructionDecoder, setResourcename, toString, warning

Methods inherited from class hades.simulator.SimObject

constructDynamicSymbol, copy, getBindkey, getClassLoader, getDebug, getEditor, getFullName, getName, getParent, getPort, getPorts, getResourceAsStream, getSimulator, getSymbol, getSymbolResourceName, getVersionId, isVisible, keyPressed, message, mousePressed, needsDynamicSymbol, setClassLoader, setConsole, setDebug, setEditor, setName, setParent, setPorts, setSimulator, setSymbol, setVersionId, setVisible, tearDown

Methods inherited from class java.lang.Object

clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

Field Detail

port_A

protected PortStdLogicVector port_A

port_DIN

protected PortStdLogicVector port_DIN

port_DOUT

protected PortStdLogicVector port_DOUT

port_nWE

protected PortStdLogic1164 port_nWE

port_nCS

protected PortStdLogic1164 port_nCS

port_nOE

protected PortStdLogic1164 port_nOE

addr_offset

protected int addr_offset

t_access

public static final double t_access

See Also:

Constant Field Values

t_tristate

public static final double t_tristate

See Also:

Constant Field Values

t_undefined

public static final double t_undefined

See Also:

Constant Field Values

t_setup

public static final double t_setup

See Also:

Constant Field Values

t_min_we_cycle

public static final double t_min_we_cycle

See Also:

Constant Field Values

editor

protected DcoreDisassemblerEditorFrame editor

Constructor Detail

DcoreRAM

public DcoreRAM()

DcoreRAM constructor

Method Detail

constructPorts

protected void constructPorts()

construct the ports for this memory. Note that the address bus width is one bit higher than might be expected, due to the word-address vs. byte address conflict: external adresses are byte addresses, but the memory stores words...

Overrides:

constructPorts in class GenericMemory

getAddrOffset

public int getAddrOffset()

Description copied from interface: Memory

utility method to support systems with different memory components mapped into a single address space at different offsets. Note that the value returned is just used for displaying the addresses in the GUI (e.g. MemoryHexEditorField or MRCanvas), while the simulation uses the raw adresses (always starting at 0).

For example, the D*CORE processor used in our T3 practical course uses one ROM mapped to addresses 0x000..0x6FFF with address offset 0, a RAM mapped to addresses 0x8000..0xFFFF with address offset 0x8000, and IO components mapped to 0x7000..0x7FFF. Standard memory components will usually return 0 here.

Specified by:

getAddrOffset in interface Memory

Overrides:

getAddrOffset in class GenericMemory

canChangeSize

public boolean canChangeSize()

Specified by:

canChangeSize in interface Memory

Overrides:

canChangeSize in class GenericMemory

setSize

public void setSize(int n_words)

Specified by:

setSize in interface Memory

Overrides:

setSize in class GenericMemory

setBitsPerWord

public void setBitsPerWord(int n_bits)

Specified by:

setBitsPerWord in interface Memory

Overrides:

setBitsPerWord in class GenericMemory

resize

public boolean resize(int n_words,
                      int n_bits)

Specified by:

resize in interface Memory

Overrides:

resize in class GenericMemory

elaborate

public void elaborate(java.lang.Object arg)

elaborate(): On elaboration, the inputs of the DcoreRAM will be undefined. Correspondingly, the outputs are, too.

Specified by:

elaborate in interface Simulatable

Overrides:

elaborate in class GenericMemory

evaluate

public void evaluate(java.lang.Object arg)

evaluate(): If either port_nCS, port_nOE or port_nWE are undefined, the DcoreRAM data is invalidated, and the DOUT value is undefined. If port_nCS is high, the DcoreRAM is inactive. That is, the outputs are tristated, and all write requests are ignored. If port_nCS is low, the output is driven with the memory contents of the currently active address. Also, as long as port_nWE is low, the input data is written to the active address.

Warning: The DcoreRAM model currently does not check for timing violations or address glitches during write cycles. Instead, the corresponding memory locations are written.

Specified by:

evaluate in interface Simulatable

Overrides:

evaluate in class GenericMemory

parse

public boolean parse(java.io.BufferedReader br)
              throws java.lang.Exception

parse RAM data from a file specified via its Java 1.1 resourcename. If the file is not found or contains illegal data, the RAM is re-initialized to the all-invalid state.

Each line of the RAM data file should contain the address and the corresponding data in hex format, seperated by a colon, e.g. '0001:0000' or '03FF:CAFE'. A value of "XXXX" or "ZZZZ" or "UUUU" is also accepted and results in the value "xxxx" for the corresponding address.

Input file lines starting with a '#' or ';' character are interpreted as comment lines and are ignored, with the single exception of the following special comments used to specify labels: '#label addr name', e.g. '#label fffc RESET'.

This RAM model converts from external byte addresses to internal word addresses on input and output. Therefore, all addresses in the input file should be word-aligned byte addresses, i.e. 0000, 0002, 0004, 0006, ..., fffe.

The RAM model will issue a warning message, if the same location is written multiple times or if misaligned addresses are used.

Specified by:

parse in interface Memory

Overrides:

parse in class GenericMemory

Throws:

java.lang.Exception

parseLabelLine

protected void parseLabelLine(java.lang.String line)
                       throws java.lang.Exception

Overrides:

parseLabelLine in class GenericMemory

Throws:

java.lang.Exception

save

public boolean save(java.io.PrintWriter PW)

write the memory data in a trivial addr:data format, one address per line. Both address and data are hex-formatted and separated by a colon (and optionally, some blanks).

Specified by:

save in interface Memory

Overrides:

save in class GenericMemory

write

public void write(java.io.PrintWriter ps)

Overrides:

write in class GenericMemory

initialize

public boolean initialize(java.lang.String s)

initialize this DcoreRAM from a String. Currently, the String should contain the following things: the GenericMemory versionId, the number of words, the bits per word, the offset (all in decimal) and the Java resource-name of the ROM/RAM datafile to parse, e.g.

       1001 1024 16 8000 /hades/examples/b-tutorial/ampel-43.rom
    

Overrides:

initialize in class GenericMemory

createEditor

protected void createEditor()

configure

public void configure()

Description copied from class: SimObject

create and display a 'ConfigDialog' to set the parameters for a SimObject. The default ConfigDialog for the base class (SimObject) itself is empty except for the 'instance name' of the SimObject.

Overrides:

configure in class GenericMemory

getPropertySheet

public java.awt.Component getPropertySheet()

Description copied from class: SimObject

return a reference to the 'property sheet' or configuration window for this SimObject. We cast the return value to an AWT Component, but typically you can expect either a hades.gui.PropertySheet or an java.awt.Window (Dialog or Frame).

Overrides:

getPropertySheet in class GenericMemory