Index of /publications/2003/dissMaeder/benchmark/opw/verilog

Icon  Name                                         Last modified      Size  
[PARENTDIR] Parent Directory - [DIR] work/ 2002-07-27 12:41 - [   ] verilog.time 2002-07-27 10:43 893 [   ] verilog.out 2002-07-27 10:25 70 [TXT] verilog.csh 2002-07-27 10:19 659 [   ] vcs62.time 2002-07-27 10:07 5.3K [   ] vcs62.out 2002-07-27 09:53 92 [TXT] vcs62.csh 2002-07-27 09:52 892 [   ] opwTst.v 2002-07-27 09:47 2.7K [   ] opwS.v 2001-12-05 11:47 71K [   ] ncsim.time 2002-07-27 12:40 1.1K [   ] ncsim.scr 2002-07-27 12:36 9 [   ] ncsim.out 2002-07-27 12:37 188 [TXT] ncsim.csh 2002-07-27 12:09 1.4K [   ] make-vlog 2002-07-27 11:54 182 [   ] hdl.var 2002-07-27 11:52 64 [   ] cds.lib 2002-07-27 11:56 93
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