TAMS / Java / Hades / applets (print version): contents | previous | nextDigital clock with BCD counters
DescriptionA digital clock with display for hours, minutes and seconds.
The circuit is built from a cascade of six asynchronous, falling-edge
triggered BCD counters with a simple trick to reset the counters
at the corresponding times.
The counter for the lower seconds digit simply runs continously.
The upper seconds digit counter, however, needs to be reset after
59 seconds to avoid counting to 99 seconds.
This is achieved by connecting the asynchronous reset input of the
counter block to its Z2 and Z1 outputs.
Therefore, as soon as the counter reaches 60, it is immediately
asynchronously reset and at the same time generates the carry
to increment the minutes counter - which uses the same structure
as the seconds counter.
The hours counters use the same trick to immediately asynchronously
reset the hours after the hours reach the value 24.
Because the reset is asynchronous and very fast, the user has no chance
to see the wrong values (like 00:00:60 or 24:00:00) before these
are corrected to the right values.
Run the applet | Run the editor (via Webstart)
Impressum | 24.11.06
http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/30-counters/80-digiclock/digiclock_print.html