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Four-digit decimal counter with TTL-series 74390 DescriptionA four-digit asynchronous decimal counter
built from two TTL-series 74390 integrated circuits.
To speed-up or slow-down the counting, open the property sheet
of the clock generator (popup menu, edit component) of the
clock generator and change the clock period.
Each 74390 integrated circuit contains the equivalent of
two 7490 decimal counters
(see the previous applet)
with a common reset input.
Again, the 1:10 counter is realized in two stages of 1:2 and 1:5.
For a decimal counter, the CLKB input is connected to the QA output
of the 1:2 stage.
The applet shows a simple trick to build a multiple stage counter.
A single AND gate connected to the A and D outputs of the counter
flipflops provides the clock signal for the next counter stage.
This works because the counter flipflops are sensitive
to the falling edge of the clock input.
The AND gate outputs a logical 1 while the counter holds the value
nine (bit-pattern 1001) and changes back to logical 0 when the
counter changes to zero (0000).
This generates the falling clock-edge for the next stage counter.
Run the applet | Run the editor (via Webstart)
Impressum | 24.11.06