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Buses and the std_logic_1164 resolution function

Buses and the std_logic_1164 resolution function screenshot

Description

One of the most important reasons to use multi-level logic systems is the simulation of buses, that is, signals driven by multiple sources. First, a bus driven by only one active component should behave like any normal signal wire. Second, the simulation should allow to detect short-circuit conditions when the bus is driven by multiple sources with conflicting values. Third, it should also support common situations like pullup-resistors to force a weak but well-defined logical value when the bus is not driven by any active component.

In the std_logic_1164 system, the value 'X' is used to model the short-circuit condition, while the 'Z' value is used for a high-impedance state that is not driven by any component. Finally, the 'H' and 'L' (weak '1' and weak '0') values allow to model the situation of a bus connected to pullup or pulldown resistors. In a VHDL simulator, a so-called resolution function is automatically created and used for each bus, whose task is to calculate the new logic value on the bus as a function of the bus input values. The default resolution function reads the first two input values and calculates the output value from the following truth table. The resulting value is then combined with each of the additional input values. For example, resolve(U,0,0,1) = U, resolve(0,Z,0,L,0) = 0, resolve(Z,1,0) = X, etc. This same resolution function is also used by Hades.

VHDL std_logic resolution function table:

    U X 0 1 Z W L H D
    -----------------
U | U U U U U U U U U  
X | U X X X X X X X X    
0 | U X 0 X 0 0 0 0 X
1 | U X X 1 1 1 1 1 X
Z | U X 0 1 Z W L H X
W | U X 0 1 W W W W X
L | U X 0 1 L W L W X
H | U X 0 1 H W W H X
D | U X X X X X X X X

The applet demonstrates the tri-state driver component used to drive buses and the std_logic bus resolution function. As usual, the tri-state driver (hades.models.gates.NTri) is an inverting driver. As long as the input value on the enable input (S) is high, the driver generates a Z (high-impedance) output value, which effectively disconnects the driver from the bus. Once the input value on the enable input is 0, the driver is activated and the Y output value is the inverted A input value. Finally, an undefined S input value will result in a invalid X output value.

The bus on the right side of the applet schematics is connected to three of these tri-state drivers. A pullup resistor is used to generate a 'H' (weak '1') value for the bus as long as no driver is activated. Please play with the enable and data inputs of all three tri-state drivers and watch the resulting behaviour of the bus. If only one driver is active, the bus will be set to the inverted value of the drivers data input. If multiple drivers are enabled, but generate compatible values, the bus will have that value. A short-circuit condition, however, will result in the 'X' value on the bus.

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Impressum | 24.11.06
http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/00-intro/03-stdlogic/resolution_print.html