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Ring oscillator

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Circuit Description

This circuit presents an eleven stage ring oscillator. Despite the fancy name, this is actually just a chain of inverters. To initialize and control the circuit, one stage uses a NAND gate instead of an inverter.

When the extra NAND gate input is set to a 0 value, its output is forced to a 1 output value, which in turn generates a 1-0-1-0-1-0 value pattern on the subsequent inverters. If the number of gates were even, the input value for the NAND gate would be a 0, so that the resulting gate outputs would create a stable state of the circuit.

However, the number of inverting gates in a ring oscillator is always odd and there is no stable state. In our example, the 1-0-1-0-1-0 value pattern ultimately leads to an input value of 1 on the feedback NAND gate input. Therefore, as soon as the external input is switched back to a 1 value, the NAND gate toggles its output value to 0 and the inverters begin to toggle in turn, finally resulting in a 0 input value to the feedback NAND gate input. At that moment, the NAND gate toggles again and the sequence repeats.

The following waveforms show the procession of the 1-0 pattern through the eleven stages of the ring. Note that the switching frequency at each gate is inverse proportional to both the number of gates in the ring and the gate delay of each individual gate:

ring oscillator waveforms

Ring oscillators are often used as prototype circuits to test new semiconductor processes, because they are so simple and therefore very easy to design. They also allow to run the gates of the new process at optimal speed, which is ideal to optimize the design parameters and layout rules for the new process. In such cases, usually one or a few of the gate outputs are connected to buffers, which are then routed to output pads of the integrated circuits and to external equipment like counters and oscilloscopes. While the single gates operate at very high frequencies (e.g. a few picoseconds of delay), the resulting ring oscillator output frequency is essentially divided by the number of gates in the circuit and therefore accessible to external equipment.

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