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Parity generator (4 bit)

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Circuit Description

A simple 4-bit parity generator for even parity, built with four XOR gates.

(Note: The corresponding exercise in our introductory courses does not include the hint to use the XOR gates. The attempt to minize the parity generator function using KV-maps and then implementing the circuit using AND-OR gates results in a somewhat larger circuit...)

Print version | Run this demo in the Hades editor (via Java WebStart)
Usage | FAQ | About | License | Feedback | Tutorial (PDF) | Referenzkarte (PDF, in German)
Impressum http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/10-gates/12-parity/parity4.html